Module Machine

module Machine: sig .. end
Abstract representation of hardware architecture

module type Gettable_settable = sig .. end

Abstract representation of hardware architecture
type isa = 
| X86 (*
x86 32 bits
*)
| AMD64 (*
aka x86-64
*)
| PowerPC (*
Power PC 32 bits
*)
| ARM (*
ARM 32 bits
*)
| Unknown
type endianness = 
| LittleEndian
| BigEndian
module ISA: Gettable_settable  with type t = isa
module Endianness: Gettable_settable  with type t = endianness
module Word_size: Gettable_settable  with type t = int
Word size of the machine in bits

General setters


val set_x86 : unit -> unit
X86 and LittleEndian
val set_amd64 : unit -> unit
AMD64 and LittleEndian
val set_powerpc : unit -> unit
PowerPC and BigEndian
val is_unknown : unit -> bool
val set_unknown : unit -> unit
No architecture and LittleEndian. Anything can happen.
val set_arm : endianness -> unit
ARM with chosen endianness.
val set_arm_little : unit -> unit
val set_arm_big : unit -> unit
val pp : Format.formatter -> unit -> unit
pp ppf arch pretty-prints an arch value into ppf